DOE Semiconductor Research & Excellence Initiative

Federal semiconductor policy is no longer just about tax incentives and factory subsidies. It is also about research, supply-chain security, and cross-agency planning on microelectronics. For the export control framework that restricts semiconductor technology transfers, see export controls and dual-use technology. Title 15 now contains a substantial semiconductor chapter built around incentives, industrial-base review, national strategy, security restrictions, and additional implementation authorities. Although the most publicly visible pieces often sit with Commerce's CHIPS incentives, the statute also gives the Department of Energy a major role in the federal microelectronics strategy, especially through research, supply-chain work, and national-lab capabilities.

Current Law (2026)

Legal Authority

• 15 U.S.C. § 4652 — Commerce semiconductor incentives program
• 15 U.S.C. § 4653 — Department of Defense public-private partnership for secure microelectronics
• 15 U.S.C. § 4654 — Commerce review of the U.S. microelectronics industrial base
• 15 U.S.C. § 4656 — National strategy and subcommittee on microelectronics leadership and competitiveness
• 15 U.S.C. § 4657 — Ban on providing funds to foreign entities of concern
• 15 U.S.C. § 4659 — Additional implementation authorities for Commerce

Key Numbers

• CHIPS and Science Act total investment (2022): $52.7 billion — $39 billion in manufacturing incentives, $11 billion for R&D and workforce, $2.5 billion for international partnerships — the largest federal industrial-policy investment since World War II
• DOE CHIPS science funding: approximately $11 billion over 5 years for DOE national laboratory semiconductor R&D, including advanced packaging, 2D materials, neuromorphic computing, and energy-efficient chip design
• DOE microelectronics research centers (2024): $160 million for 3 university-led research centers focused on advanced packaging, heterogeneous integration, and co-design of hardware and software
• Major fab announcements enabled by CHIPS incentives: TSMC Arizona ($40B, 3nm and 2nm production), Intel Ohio ($20B first phase of $100B "Silicon Heartland" investment), Samsung Texas ($17B fab in Taylor), Micron New York ($100B over 20 years in Clay, NY) — all announced 2022-2024
• U.S. share of global semiconductor manufacturing (2022 vs. target): 12% global share; CHIPS Act goal is to increase to approximately 20% by 2030
• "Guardrails" provision: CHIPS incentive recipients cannot significantly expand semiconductor manufacturing capacity in China for 10 years — the most significant restriction on corporate behavior in the package

How It Works

The CHIPS and Science Act divides semiconductor policy into two complementary streams. Commerce administers the $39 billion manufacturing incentive fund — direct grants and forgivable loans to companies building or expanding fabs and packaging facilities in the U.S. — targeting commercial-scale production of leading-edge chips. DOE administers approximately $11 billion in science and R&D through national laboratories and university partnerships, investing in the next generation of chip architecture and materials that the commercial sector won't fund on a 5–15 year horizon. National labs at Argonne, Oak Ridge, Brookhaven, and Lawrence Berkeley are conducting research on advanced packaging (assembling chiplets from multiple manufacturers into high-performance packages), 2D materials like graphene that could enable architectures beyond silicon's limits, neuromorphic computing that mimics the brain's energy efficiency, and hardware-software co-design from first principles rather than retrofitting software to existing chip architectures.

The China guardrails in § 4657 are the most consequential policy restriction for companies receiving CHIPS incentives: any recipient is prohibited from making significant expansions of semiconductor manufacturing capacity in China or other "foreign countries of concern" for 10 years. For Intel, TSMC, Samsung, and SK Hynix — all of which have existing China operations — accepting U.S. government money directly constrains their Chinese business strategy. Commerce has issued guidance defining "significant expansion," but the boundary between normal maintenance and prohibited expansion remains contested. The domestic investment strategy is paired with export controls: Commerce's October 2022 rules (updated October 2023) prohibited export of advanced AI chips (Nvidia A100/H100 class), sub-16nm chip manufacturing equipment, and advanced chip design software to Chinese entities without a license — the dual approach of subsidizing domestic capacity while restricting Chinese access is the defining structure of U.S. semiconductor industrial policy.

How It Affects You

If you work in semiconductor manufacturing, design, or equipment: The CHIPS Act's incentive programs are active and awarding grants. Commerce's CHIPS Program Office has made awards to TSMC, Intel, Micron, Samsung, GlobalFoundries, and others. If your company is applying for CHIPS funding, the application requires detailed workforce plans, community benefit agreements, and commitments on childcare and housing for new manufacturing workers — CHIPS is industrial policy with social conditions attached. The 10-year China guardrail is a real constraint; model your existing China operations against the "significant expansion" definition before applying.

If you work in semiconductor supply chains, packaging, or materials: Advanced packaging is the fastest-growing segment of the domestic investment push. U.S. packaging capacity was severely limited before CHIPS — most advanced packaging happened in Taiwan, South Korea, and Malaysia. The CHIPS investments at TSMC, Amkor, and other facilities are specifically increasing domestic packaging capacity. This affects equipment suppliers, substrate manufacturers, and testing companies that serve the packaging segment.

If you're a researcher at a university or national lab: DOE's $11 billion in CHIPS science funding is creating the largest new wave of microelectronics research funding since the Cold War-era semiconductor investments. The three DOE-funded university-led research centers on advanced packaging and heterogeneous integration are expanding rapidly. If your institution is not already engaged with DOE's semiconductor research programs, the funding landscape has changed significantly since 2022.

If you're a state or local economic development official in a community receiving a major fab: CHIPS incentives have been structured to include community benefit agreements requiring significant workforce development, childcare, and housing commitments from recipients. Intel's Ohio fab received approximately $7.86 billion in CHIPS grants but committed to workforce training partnerships with Ohio State University and community colleges. Understanding how to capture these workforce and supply-chain spillovers for local communities is the active challenge for state and local officials near major fab sites.

State Variations

This is a federal framework, but state impacts differ sharply:

• States with major fab, packaging, or national-lab footprints benefit much more directly
• State incentive packages often interact with federal semiconductor support
• Workforce and education pipelines vary significantly by region

Implementing Guidance

The semiconductor chapter is implemented through agency funding programs, strategy work, CHIPS-related guidance, and cross-agency execution rather than one simple regulatory code.

Pending Legislation (119th Congress)

No major standalone 119th Congress legislation was prominent as of April 2026 to replace the core semiconductor chapter, though appropriations, implementation oversight, and geopolitical restrictions remain active topics.

Recent Developments

The Trump administration's relationship with the CHIPS Act has been complicated. During the 2024 campaign, Trump called the CHIPS Act "horrible" and suggested tariffs were a better tool for reshoring semiconductor manufacturing than subsidies. But once in office, the administration did not move to rescind the law — largely because major fab investments in Ohio, Arizona, and Texas were in Republican-leaning states with Republican congressional delegations strongly supportive of the jobs. Commerce Secretary Howard Lutnick signaled continued implementation, though with modified conditions and less emphasis on the worker benefit requirements that the Biden administration had negotiated into grant agreements.

Intel's Ohio fab project became a flashpoint. Intel received approximately $7.86 billion in CHIPS grants in early 2024, the largest single CHIPS award. But Intel subsequently experienced severe financial difficulties — laying off 15,000+ workers globally, canceling planned expansions, and losing market share to Nvidia in AI chips and TSMC in advanced logic. The Ohio fabs, originally projected to start production in 2025-2026, have faced delays. The question of whether a struggling Intel can execute on its CHIPS commitments has cast a shadow over the program's manufacturing ambitions.

TSMC's Arizona facilities progressed despite initial challenges. TSMC's Phoenix fab produced its first advanced chips in late 2024, approximately a year behind original schedule due to workforce availability issues — TSMC found it difficult to recruit enough skilled semiconductor technicians in Arizona and had to bring workers from Taiwan. The experience highlighted the workforce dimension that DOE and NSF CHIPS education investments (community college semiconductor programs, university engineering enrollment expansion) are designed to address over the next decade.

Export control escalation continued. The Commerce Department updated semiconductor export restrictions in October 2023 and again in late 2024, closing loopholes that had allowed some advanced chips to reach Chinese entities through third-country intermediaries. Nvidia developed lower-capability chips specifically designed to comply with export restrictions while still selling into the Chinese market — a dynamic that illustrated the arms-race quality of chip export controls.