SLAB · CIK 1038074
What Silicon Laboratories Inc. told the SEC could break it.
Nearly everything Silicon Labs flagged traces back to its concentration in Taiwan and the broader Pacific Rim: as a fabless chipmaker it relies on just two foundries, TSMC and SMIC, to fabricate a significant portion of its products, and most of its foundries and several assembly-and-test sites sit in a region with significant earthquake risk near major fault lines — so a disruption there could halt production for a substantial period with no quick alternative. That footprint also exposes it to China–U.S. trade policy, heightened by its reliance on SMIC, a Chinese foundry under U.S. export scrutiny, and the roughly 33% of revenue shipped to China, where tariffs and export controls could disrupt supply and push customers toward Chinese-favored alternatives.
3 self-disclosed vulnerabilities, pulled from its own filings, each in the company’s words, with the source. This is the risk register almost nobody reads.
In its own words
What could break it.
Geographic concentration
- Taiwan & Pacific Rim foundry / assembly-test concentration (earthquake-prone)high
Most of Silicon Labs' foundries and several assembly-and-test subcontractor sites are in Taiwan, with the rest across the Pacific Rim — a region with significant earthquake risk near major fault lines — concentrating its entire production chain (and many customers) in one geography exposed to earthquakes, tsunamis, conflict or political unrest.
“Most of our foundries and several of our assembly and test subcontractors' sites are located in Taiwan and most of our other foundry, assembly and test subcontractors are located in the Pacific Rim region. In addition, many of our customers are located in the Pacific Rim region. The risk of earthquakes in Taiwan and the Pacific Rim region is significant due to the proximity of major earthquake fault lines in the area.”
Regulatory & policy
- China–U.S. trade restrictions, tariffs & export controlsmedium
Silicon Labs is exposed to China–U.S. trade policy — tariffs, export controls and other trade barriers — which is heightened by its reliance on SMIC (a Chinese foundry subject to U.S. export scrutiny) and the ~33% of revenue shipped to China; trade tensions could disrupt supply and push customers toward Chinese-favored alternatives.
“Protectionist laws and business practices, including trade restrictions, tariffs, export controls, quotas and other trade barriers, including China-U.S. trade policies.”
Supplier concentration
- Wafer-supply dependence on two foundries (TSMC, SMIC)medium
As a fabless company, Silicon Labs has a significant portion of its products fabricated by just two foundries, TSMC and SMIC; an inability of either to deliver wafers on time could halt production of its products for a substantial period, with no quick alternative given the long requalification cycle for new fabs.
“A significant portion of the Company's products are fabricated by Taiwan Semiconductor Manufacturing Co. (“TSMC”) or Semiconductor Manufacturing International Corporation (“SMIC”). The inability of TSMC or SMIC to deliver wafers to the Company on a timely basis could impact the production of the Company's products for a substantial period of time.”
SEC filing →As of 2026
The hidden graph
Who it depends on, and who depends on it.
Relationships surfaced from filings, including ones disclosed by the other side, which is how the non-obvious ones come to light.
Its customers
Edom Technology Co., Ltd.
“Two of our distributors who sell to our customers, Arrow Electronics and Edom Technology, represented 28% and 21% of our revenues during fiscal 2025, respectively.”
Cited →“Two of our distributors who sell to our customers, Arrow Electronics and Edom Technology, represented 28% and 21% of our revenues during fiscal 2025, respectively.”
Cited →
Its suppliers
Semiconductor Manufacturing International Corporation (SMIC)
“We currently partner primarily with Taiwan Semiconductor Manufacturing Co. (“TSMC”) and Semiconductor Manufacturing International Corporation (“SMIC”) to manufacture the majority of our semiconductor wafers.”
Cited →
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