CoWoS Advanced Packaging (TSMC)

Taiwan Semiconductor Manufacturing Company (TWSE: 2330; founded 1987 by Morris Chang); the world's dominant pure-play foundry and the most critical single company in the global technology supply chain. TSMC manufactures approximately 90% of all sub-5nm logic chips globally, including every NVIDIA AI GPU (H100 on N4, H200 on N4X, B200 on N3E), every Apple processor (A18 on N3E, M4 on N3E), and every AMD data center chip. TSMC's N3 and N5 fabs are located in Taiwan — 100 miles from mainland China. Revenue: $93.7B (2024, +34% YoY). AI/HPC share of revenue: 57% (Q3 2025), up from 18% in 2019. N2 volume production began Q4 2025 at Fab 22 Kaohsiung — world's first 2nm logic node in production. TSMC Arizona Fab 21 Phase 1 (N4P) reached 92% yield and profitability in 2025. CHIPS Act recipient: $6.6B grant + $5B loan.

World's largest OSAT (Outsourced Semiconductor Assembly and Test) by revenue. ASE's 'CoWoP' (Chip on Wafer on Panel) is a CoWoS-equivalent 2.5D advanced packaging service. TSMC is outsourcing 240K-270K CoWoS wafers annually to ASE (and Amkor) starting 2026 as internal capacity hits limits. ASE CoWoP projected to reach 20,000-25,000 wspm by end 2025 — a 3x expansion. Primary packaging partner for mid-tier AI ASICs; not yet primary route for NVIDIA Blackwell-class products.

Samsung Electronics Co., Ltd. (KRX: 005930; ~$200B revenue) is the world's largest NAND flash memory manufacturer with ~33% global market share. Samsung's NAND operations span the Pyeongtaek P3 complex (South Korea) and — critically — the Xi'an, Shaanxi, China facility, which is Samsung's largest single NAND fab by capacity. Samsung received a one-year BIS export control exemption (later extended) to continue upgrading Xi'an equipment under US restrictions. Samsung pioneered 3D NAND V-NAND technology in 2013 (first commercial 3D NAND) and now produces 200+ layer V-NAND. Also produces DRAM (world's largest) and logic chips (Exynos, foundry).

Second-largest global OSAT; U.S.-headquartered with primary advanced packaging at K5 facility in Songdo, South Korea. Tripled advanced 2.5D packaging capacity at K5 to ~7,000 wspm by late 2024. Intel manufacturing partner for EMIB (Embedded Multi-Die Interconnect Bridge) high-volume production. TSMC outsourcing overflow CoWoS wafers to Amkor starting 2026. New Vietnam factory expanding into high-end packaging.

Intel Corporation's external foundry business (Nasdaq: INTC; spun into Intel Foundry Services in 2021 under Pat Gelsinger; accelerated under CEO Lip-Bu Tan from 2024). Intel is attempting to become the third advanced logic foundry at sub-7nm, targeting 18A (1.8nm-class) and 20A process nodes. 18A uses RibbonFET (Intel's GAA transistor) and PowerVia (backside power delivery) — the most aggressive process technology on the roadmap. However, 18A yields were reportedly ~10% at risk production (August 2025), far below the 70-80% needed for external customer viability. Intel 4 (Leixlip Ireland, Fab 34) is in volume production for internal products. Ohio New Albany fabs (Intel 18A, $20B investment) under construction. CHIPS Act recipient: $8.5B grant. Intel Foundry holds ~1-2% of advanced logic market — primarily Intel's own Panther Lake CPUs and Lunar Lake. External customer viability expected 2027 at earliest.